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NT6881 usb keyboard micro - controller 1 v2.6 features n built - in 6502 8 - bit cpu n 3 mhz cpu operation frequency when oscillator is running at 6 mhz n 6k bytes of rom n 256 bytes of sram n one 8 - bit programmable base timer with pre - divider circuit n 29 programmable bi - directional i/o pins including two externa l interrupts n 3 led direct sink pins with internal serial resistors n on - chip oscillator (crystal or ceramic resonator) n watch - dog timer reset n built - in power on reset n usb interface n 3 endpoints provided n remote wakeup provided n cmos technology for low power consu mption n 40 - pin dip package, 42 - pad chip form and cob general description the NT6881 is a single chip micro - controller for usb keyboard applications. it incorporates a 6502 8 - bit cpu core, 6k bytes of mask rom, and 256 bytes of ram used as working ram and stack area. it also includes 29 programmable bi - directional i/o pins with built - in resistors, and one 8 - bit pre - loadable base timer. additionally, it includes a built - in power - on reset, a built - in low voltage reset, an oscillator that requires crystal or ceramic resonator applied, and a watch - dog timer that prevents system standstill. pin configuration gnd vcp vdp vdm p30 p31 int0/p32 int1/p33 p34 p11 p00 p02 p03 p17 p04 p20 p21 p22 p23 p25 p26 led0 led1 v dd led2 osco osci p12 p27 NT6881 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 reset p01 p05 p06 p07 p10 17 18 19 20 p24 p16 p15 p14 p13 24 23 22 21 pad configuration 26 25 18 17 16 15 14 4 3 2 1 42 41 40 39 p 1 0 p 1 1 p 1 2 p 1 3 p 1 4 p 0 6 p 0 5 p 0 4 p20 p21 p22 p23 p24 p25 p26 p27 led0 led1 led2 vdm p30 p31 p32 p33 p34 reset p00 p01 p02 v d p v c p g n d g n d o s c i o s c o v c c v c c p 0 7 13 12 11 10 9 8 7 5 35 36 37 38 31 32 33 34 27 28 29 30 24 23 22 21 20 19 p03 6 p 1 5 p 1 6 p17 NT6881h
NT6881 2 block diagram power down/up 6k bytes mask rom 6502 cpu interrupt controller base timer watch dog timer 256 bytes sram sie fifos serial bus manager vcp vdp vdm led0 led1 led2 p00~p07 p10~p17 p20~p27 p30~p34 osci osco v dd gnd reset timing generator power-on reset transceiver i/o ports
NT6881 3 pin and pad descriptions p in no. pad no. designation i/o description 1 1,2 gnd p ground 2 3 vcp o usb 3.3v driver 3 4 vdp i/o usb data plus 4 5 vdm i/o usb data minus 6 bi - directional i/o 5 p30 i/o program output enable 7 i/o bi - directional i/o 6 p31 program control 7 8 p32/int0 i/o bi - directional i/o shared with int0 8 9 p33/int1 i/o bi - directional i/o shared with int1 9 10 p34 i/o bi - directional i/o 11 reset i internally pulled down resistor 10 program supply voltage 12~19 p00 ~ p07 i/o bi - directional i/o 11 ~ 18 program address buffer 20~24 p10 ~ p14 i/o bi - directional i/o 19 ~ 23 program address buffer 25 p15 i/o bi - directional i/o 24 program chip enable 25 ~ 26 26~27 p16 ~ p17 i/o bi - directional i/o 28~35 p20 ~ p27 i/o bi - directional i/o 27 ~ 34 program data buffer 36 led0 o led direct sink 35 mode selection 37 led1 o led direct sink 36 mode selection 38 led2 o led direct sink 37 mode selection 38 39,40 v dd p power supply (+5v) 39 41 osco o cr ystal oscillator output 40 42 osci i crystal oscillator input
NT6881 4 functional description 1. 6502 cpu the 6502 is an 8 - bit cpu that provides 56 instructions, decimal and binary arithmetic, thirteen addressing modes, true indexing capability, programmable st ack pointer and variable length stack, a wide selection of addressable memory range, and interrupt input. other features are also included. the cpu clock cycle is 3mhz (6mhz system clock divided by 2). please refer to 6502 data sheet for more detailed info rmation. accumulator a index register y 0 7 7 index register x 7 0 0 stack pointer sp 0 n status register p 0 7 carry zero irq disable decimal mode brk command overflow negative 7 program counter pch 8 15 7 0 pcl 1 = true 1 = result zero 1 = disable 1 = true 1 = neg 1 = true 1 = brk v b d i z c figure 1.1. 6502 cpu registers and status flags
NT6881 5 2.instruction set list instruction code meaning operation adc add with carry a + m + c ? a ?a c and logical and a ?e m ? a asl shift left one bit c ?? m7 ?e?e?e m0 ?? 0 bcc branch if carry clear branch on c ? 0 bcs branch if carry set branch on c ? 1 beq branch if equal to zero branch on z ? 1 bit bit test a ?e m ?a m7 ? n ?a m6 ? v bmi branch if minus branch on n ? 1 bne branch if not equal to zero branch on z ? 0 bpl branch if plus branch on n ? 0 brk break forced interrupt pc + 2 ?? pc ?? bvc branch if overflow clear branch on v ? 0 bvs branch if overflow set branch on v ? 1 clc clear carry 0 ? c cld clear decimal mo de 0 ? d cli clear interrupt disable bit 0 ? i clv clear overflow 0 ? v cmp compare accumulator to memory a ?e m cpx compare with index register x x ?e m cpy compare with index register y y ?e m dec decrement memory by one m ?e 1 ? m dex decrement index x by one x ?e 1 ? x dey decrement index y by one y ?e 1 ? y eor logical exclusive - or a ? m ? a inc increment memory by one m + 1 ? m inx increment index x by one x + 1 ? x iny increment index y by one y + 1 ? y jmp jump to new location (pc + 1) ? pcl ?a (p c + 2) ? pch jsr jump to subroutine pc + 2 ?? ?a (pc + 1) ? pcl ?a (pc + 2) ? pch
NT6881 6 instruction set list (contiuned) instruction code meaning operation lda load accumulator with memory m ? a ldx load index register x with memory m ? x ldy load index register y with memory m ? y lsr shift right one bit 0 ? m7 ?e?e?e m0 ? c nop no operation no operation (2 cycles) ora logical or a + m ? a pha push accumulator on stack a ?? php push status register on stack p ?? pla pull accumulator from stack a ?? plp pull status register from stack p ?? rol rotate left through carry c ?? m7 ?e?e?e m0 ?? c ror rotate right through carry c ? m7 ?e?e?e m0 ? c rti return from interrupt p ?? ?a pc ?? rts return from subroutine pc ?? ?a pc+1 ? pc sbc subtract with borrow a ?e m ?e c ? a ?a c sec set carry 1 ? c sed set decimal mode 1 ? d sei set interrupt disable status 1 ? i sta store accumulator in memory a ? m stx store index register x in memory x ? m sty store index register y in memory y ? m tax transfer accumulator to index x a ? x tay tra nsfer accumulator to index y a ? y tsx transfer stack pointer to index x s ? x txa transfer index x to accumulator x ? a txs transfer index x to stack pointer x ? s tya transfer index y to accumulator y ? a * for more detailed specifications, plea se refer to 6502 programming data book.
NT6881 7 3 . mask rom: 6k x 8 bits the built - in mask rom program code, executed by the 6502 cpu, has a capacity of 6k x 8 - bit and is addressed from e800h to ffffh. 4. sram: 256 x 8 bits the built - in sram is used for general purpose data memory and for stack area. sram is addressed from 0080h to 017fh. because the 6502 default stack pointer is 01ffh, the stack area will map $01ff - $0180 to $00ff - $0080, thus the programmer can set ?s? register to 7fh when starting program, allo wing stack point is 017fh. as; ldx #$7f txs system registers unused ram ram unused rom $fffa $fffb $fffc $fffd $fffe $ffff nmi vector reset vector irq vector stack pointer $0000 $001f $0080 $00ff $0100 $017f $e800 nmi-l nmi-h rst-l rst-h irq-l irq-h
NT6881 8 5. system reserved registers address register reset bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 r/w $0000 irqfunc 00h ?e ?e ?e ?e kbd int1 int0 tmr r $0001 irqclrf 00h ?e ?e ?e ?e ckbd cint1 cint0 ctmr w $0002 ie_ func 00h ?e ?e ?e ?e ekbd eint1 eint0 etmr r/w $0003 irqusb 00h susp stup ?e ?e in2 in1 ot0 in0 r $0004 irqclru 00h csusp cstup ?e ?e cin2 cin1 cot0 cin0 w $0005 ie_ usb 00h esusp estup ?e ?e ein2 ein1 eot0 ein0 r/w $000 6 bt 00h bt7 bt6 bt5 bt4 bt3 bt2 bt1 bt0 w $0007 tcon 01h ?e ?e ?e ?e ?e ?e ?e enbt w $0008 tmod 00h ?e ?e ?e ?e ?e tm2 tm1 tm0 r/w $0009 port0 ffh p07 p06 p05 p04 p03 p02 p01 p00 r/w $000a port1 ffh p17 p16 p15 p14 p13 p12 p11 p10 r/w $000b po rt2 ffh p27 p26 p25 p24 p23 p22 p21 p20 r/w $000c port3 1fh ?e ?e ?e p34 p33 p32 p31 p30 r/w $000d led 07h ?e ?e ?e ?e ?e led2 led1 led0 w $000e clrwdt 00h 0 1 0 1 0 1 0 1 w $000f mode_ fg 02h ?e ?e ?e ?e ?e ?e pof susf r/w ?e : no effect 6. power - on reset built - in power - on reset circuit can generate a minimum of 5ms pulse to reset the entire chip. user also can use an external reset pin to reset the entire chip. 7. timing generator this block generates the system timing and control signals sup plied to cpu and on - chip peripherals. the crystal oscillator generates a 6mhz system clock. it only generates 3mhz clock for cpu.
NT6881 9 8. base timer (bt) the base timer is an 8 - bit counter with a programmable clock source selection. the bt can be enabled/dis abled by the cpu. after reset, the bt is disabled and cleared. the bt can be preset by writing preset value to bt7 ~ bt0 of the bt register at any time. when the bt is enabled, the bt starts counting from the preset value. when the value reaches ffh, it ge nerates a timer interrupt if the timer interrupt is enabled. when it reaches the maximum value of ffh, the bt will wrap around and begin counting at 00h. the bt can be enabled by writing a "0" to " enbt " bit in the tcon (timer control) re gister. the enbt signal is level trigger. the input clock source of bt is controlled by the tmod register. the following table shows 8 ranges of bt. tm2 tm1 tm0 pre - scalar ratio min. count max. count 0 0 0 system clock/2 3 1.33 s 341.3 3 s 0 0 1 system clock/2 4 2.66 s 682.66 s 0 1 0 system clock/2 5 5.32 s 1.36 ms 0 1 1 system clock/2 6 10.64 s 2.72 ms 1 0 0 system clock/2 7 21.28 s 5.44 ms 1 0 1 system clock/2 8 42.56 s 10.89 ms 1 1 0 system clock/2 9 85.12 s 21.79 ms 1 1 1 sy stem clock/2 10 170.24 s 43.58 ms for counting accuracy, please set the tmod register first, then preset the bt register, and enable base timer finally. (tm2, tm1, tm0) = (1, 1, 1) is reserved for usb driver use.
NT6881 10 9. interrupt controller there are 10 inte rrupt sources: timer, int0, int1, kbd, susp, in0, in1, in2, ot0 and stup. 9.1. timer interrupt when the base timer overflows, it will set the tmr flag. if the interrupt is enabled by writing "1" to the bit 0 in ie_func ($0002h), then it will interrupt 650 2 cpu. the tmr flag can be read by software. once set by an interrupt source, it can read from bit0 in irqfunc ($0000h) and remains high unless cleared by writing "1" to the bit 0 in irqclrf ($0001h). all of register's data are cleared to "0" at initializa tion by the system reset. when an interrupt occurs, the cpu jumps to $fffeh & $ffffh to execute the interrupt service routine, thus the tmr flag must be cleared by software. 9.2. int0 interrupt as soon as int0 pin detects a falling edge trigger, NT6881 se ts the int0 flag ($0000h, bit1). after that, the 6502 cpu is interrupted if this interrupt has already been enabled already by writing ?1? to eint0 ($0002h, bit1). if eint0 flag is cleared, 6502 cpu can?t be int0 interrupted even if the int0 flag is set. i nt0 flag can only be set by hardware and can not be set or cleared directly by the software except for writing ?1? to cint0 ($0001h, bit1) flag to clear int0 flag. when an interrupt occurs, the cpu will jump to $fffeh & $ffffh to execute the interrupt serv ice routine so the int0 flag must be cleared by software. 9.3. int1 interrupt as soon as int1 pin detects a falling edge trigger, NT6881 sets the int1 flag ($0000h, bit2). then the 6502 cpu is interrupted if this interrupt has already been enabled already by writing ?1? to eint0 ($0002h, bit2). if eint1 flag is cleared, 6502 cpu can?t be int1 interrupted even if the int1 flag is set. int1 flag can only be set by hardware and can not be set or cleared directly by the software except for writing ?1? to cint1 ($0001h, bit2) flag to clear int1 flag. when an interrupt occurs, the cpu will jump to $fffeh & $ffffh to execute the interrupt service routine so the int1 flag must be cleared by software. 9.4. kbd interrupt this interrupt will set the kbd flag ($0000h, bit3) every 4ms(hid 1.00 version) to indicate that keyboard scan data is ready to send for endpoint1. and then 6502 cpu is interrupted if this interrupt has been enabled already by writing ?1? to ekbd ($0002h, bit3). if the ekbd flag is cleared, 6502 cpu c an?t be kbd interrupted even if kbd flag is set. the kbd flag can only be set by the hardware and can not be set or cleared directly by firmware except for writing ?1? to ckbd ($0001h, bit 3) flag to clear kbd flag. when an interrupt occurs, cpu jumps to $ fffeh & $ffffh to execute the interrupt service routine, the kbd flag must be cleared by firmware. 9.5. in0 token interrupt when an in token for endpoint 0 is done, it will set the in0 flag. if this interrupt is enabled by writing "1" to ein0 ($0005h, bit 0), it will interrupt 6502 cpu. when an interrupt occurs, the cpu jumps to $fffeh & $ffffh to execute the interrupt service routine, the in0 flag must be cleared by the software. 9.6. ot0 (out 0) token interrupt when an out token for endpoint 0 is done, i t will set the ot0 flag. if this interrupt is enabled by writing "1" to eot0 ($0005h, bit1), it will interrupt 6502 cpu. when an interrupt occurs, the cpu jumps to $fffeh & $ffffh to execute the interrupt service routine, the ot0 flag must be cleared by th e software.
NT6881 11 9.7. in1 token interrupt when an in token for endpoint 1 is done, it will set the in1 flag. if this interrupt is enabled by writing "1" to ein1 ($0005h, bit2), it will interrupt 6502 cpu. when an interrupt occurs, the cpu jumps to $fffeh & $ff ffh to execute the interrupt service routine, the in1 flag must be cleared by software. 9.8. in2 token interrupt when an in token for endpoint 2 is done, it will set the in2 flag. if this interrupt is enabled by writing "1" to ein2 ($0005h, bit3), it will interrupt 6502 cpu. when an interrupt occurs, the cpu jumps to $fffeh & $ffffh to execute the interrupt service routine, the in2 flag must be cleared by the software. 9.9. stup (setup) token interrupt when a setup token for endpoint 0 is done, it will se t the stup flag. if this interrupt is enabled by writing "1" to estup ($0005h, bit6), it will interrupt 6502 cpu. when an interrupt occurs, the cpu jumps to $fffeh & $ffffh to execute the interrupt service routine, the stup flag must be cleared by the soft ware. 9.10. susp interrupt when usb sie detects a suspend signal, it sets the susp flag. then 6502 cpu is interrupted if the interrupt has been enabled already by writing ?1? to esusp ($0005h, bit7). if esusp flag is cleared, 6502 cpu can?t be susp inte rrupted even if susp flag is set. susp flag can be set by h/w only and can?t be set/cleared directly by s/w except for writing ?1? to csusp ($0004h, bit 7) flag to clear susp flag. when an interrupt occurs, the cpu jumps to $fffeh & $ffffh to execute the i nterrupt service routine, the susp flag must be cleared by software. 10. i/o ports the NT6881 has 32 pins dedicated to input and output. these pins are grouped into 5 ports, as follows: port0 (p00~p07) port0 is an 8 - bit bi - directional cmos i/o port that i s internally pulled high by pmos. each pin of port0 can be bit programmed as an input or output port under software control. when programmed as output, data is latch to the port data register and output to the pin. port0 pins with ?1? written to them are p ulled high by the internal pmos pull - ups, and can be used as inputs in that state then these input signals can be read. the port will output high after reset. port1 (p10~p17) : functions the same as port0. port2 (p20~p27) : functions the same as port0. port 3 (p30~p34) : functions the same as port0. except for p33/p32 is shared with int1/int0 pin. it is also a schmitt trigger input with an interrupt source of falling edge sensitive. led: there are three led direct sink pins which require no external serial r esistors. the address is mapped to $000dh.
NT6881 12 11. watch - dog timer (wdt) the NT6881 has a watch - dog timer reset function that protects programs against system standstill. the clock of the wdt is derived from the crystal oscillator. the wdt interval is about 0.15 seconds when operation frequency is 6mhz. the timer must be cleared every 0.15 second during normal operation; otherwise, it will overflow and cause system reset. (this cannot be disabled by software) before watch - dog reset occurred, the software mus t clear watch - dog register by writing #55h to clrwdt ($000eh) register. for example: lda #$55h sta $000e 12. power control the power off flag (pof) in the mode_fg register indicates whether a reset is a warm start or a cold start reset. pof i s set by hardware when an external power vcc arises to its normal operating level, and must be cleared by software in the cold reset initialization procedure. a warm start reset (pof = 0) occurs at a watch - dog reset or resume reset. address register reset bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 r/w $000fh mode_ fg 02h - - - - - - pof susf r/w 13. universal serial bus interface please refer to universal serial bus specification version 1.0 chapter 7, 8, and 9. 14. suspend and resume suspend: when sie receives suspend signal, NT6881 generates susp interrupt request. in the susp interrupt service routine, the software must carry out following steps: 1) clear susp irq flag, 2) store all the port status, 3) force return lines (port2) pull - high, 4) force scan lin es (port0, port1 and p30, p31 or p32) pull - low, 5) turn off led output, 6) clear watch - dog register. after the above action has been completed, the software must then set suslo ($1eh) to #55h and sushi ($1fh) to #aah in order to enter the suspend mode. finally, oscillator stops in order to save power. resume: when NT6881 receives a resume signal, the chip will resume and the firmware initializes itself. the initialization process includes, checking the status of the pof bit in the mode_fg register, whereas i f the pof bit equals ?1?, the firmware will enter into a cold reset procedure and clears the pof bit. if the pof bit equals ?0? , the firmware will enter into a warm reset procedure. if indeed a warm reset begins, the firmware checks the susf bit in mo de_fg. regarding the susf bit, if it equals ?1?, the firmware enters into the resume procedure and then clears the susf bit, however if susf equals ?0?, then the firmware enters into a watchdog reset procedure. when any keyboard key is struck and the remote_wake_up bit equals ?1?, a resume signal will be sent to the host, and the above procedure will repeat themselves.
NT6881 13 15. reset source summary these are 5 reset sources in NT6881 as shown below. no. type function description 1 cold external pin ( reset ) applied externally 2 cold power - on reset reset after power - on 3 cold usb reset signaling 10 ms reset period 4 warm - 1 resume reset usb reset period 5 warm - 2 watch - dog reset reset every 0.15s (osc = 6mhz) NT6881 can also be reset e xternally through the reset pin. a reset is initialed when the signal at the reset pin is held low for at least 10 system clocks. when reset signal goes high, the NT6881 begins to work. the following sh ows the definition of reset input low pulse width. 20%v dd 20%v dd v dd trstb v dd 16. ps/2 mouse application a ps/2 mouse interface is implemented in p3 2 (clk) , p3 3 (data) and p34 (power control). the timing diagrams are described as f ollows. clk data t1 t3 t4 1st clk 2nd clk start bit t1a t2 11th clk 10th clk t5 parity bit stop bit bit 0 auxiliary device sending data timings timing description min/max t1 time from data transaction to falling edge of clk 1 5/25 u s t1a time from data transaction to falling edge of clk 2-11 5/25 u s t2 time from rising edge of clk to data transaction 5/t4-5 u s t3 duration of clk inactive (low) 30/50 u s t4 duration of clk active (high) 30-50 u s t5 time to auxiliary device inhibit after clock 11 to ensure the auxiliary device does not start another transmission >0/50 u s
NT6881 14 clk data t6 t7 1st clk 2nd clk start bit t8 11th clk 10th clk t9 parity bit stop bit bit 0 auxiliary device receiving data timings timing description min/max t6 duration of clk interface (low) 30/50 u s t7 duration of clk active (high) 30/50 u s t8 time from inactive to active clk transition, used to time when the auxiliary device samples data 5/25 u s t9 time from falling edge of line control bit to falling edge of clock 11 clk 5 u s/ t10 time from rising edge of clock 11 to rising edge of line control bit 5/25 u s t10 line control bit 9th clk i/o inhibit
NT6881 15 absolute maximum rating* dc supply voltage . . . . . . . . . . . . . - 0.3v to +7.0v input/output voltage . . . . . gnd - 0.2v to v dd + 0.2v operating ambient temperature . . . . . . . 0 c to 70 c storage temperature . . . . . . . . . . . - 55 c to +125 c operating voltage (v dd ) . . . . . . . . . . . +4.4v to +5.25v *comments stresses above those listed under "absolute maximum rating" may cause permanent damage to the device. these are stress ratings only. functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied and exposure to absolute maximum rating conditions for extended periods may aff ect device reliability. dc electrical characteristics (v dd = 5v, gnd = 0v, t a = 25 c, fosc = 6mhz, unless otherwise noted) symbol parameters min. typ. max. unit conditions v dd operating voltage 4.4 5 5.25 v i op operating current 20 m a no load i sp suspend current 150 a note 1 v ih input high voltage 2 v v il input low voltage 0.8 v v oh output high voltage 2.4 v i oh = - 100a v ol1 output low voltage (p0/p1/p2) 0.4 v i ol1 = 4ma v ol2 output low voltage (p3) 0.4 v i ol2 = 5ma i led led s ink current 6 10 14 ma v ol = 3.2v note 1: the test condition of i sp is when both of 2 things occur, 1) an oscillation stop and 2) no application circuit is applied. when an application circuit is applied in the keyboard, and the pc is suspended, the s uspend current of the keyboard must be less than 500a. ac electrical characteristics (v dd = 5v, gnd = 0v, t a = 25 c, fosc = 6mhz, unless otherwise noted) symbol parameters min. typ. max. unit conditions f osc oscillator frequency 5.97 6 6.03 mhz osc wit hin +/ - 0.5% t rstb reset input low pulse width 1.67 m s 10 system clocks t por power on reset time 5 30 ms usb dc/ac specifications please refer to universal serial bus specification version 1.0 chapter 7.
NT6881 16 application circuit 1 (simple keyboard with ps/2 mouse) NT6881 vcc gnd led0 led1 led2 osci osco vcp num lock caps lock scroll lock to usb cable v cc vdm vdp 4.7 m f 6mhz crystal 10 m f 1.5k o *1 *1 : reset can be direct connect to vcc if the external reset is not used for module test. p20 p21 p22 p23 p24 p25 p26 p27 0.1 m f p06 p07 p10 p11 p12 p13 p14 p15 p16 p17 p30 p31 p00 p01 p02 p03 p04 p05 kor_l d+ d- p00 p01 p02 p03 p04 p05 p06 p07 p10 p11 p12 p13 p14 p15 p16 p17 p30 p31 4.7k o p20 p21 p22 p23 p24 p25 p26 p27 reset p33 p34 r f3 t d f f4 g c v b f2 % 5 $ 4 # 3 e k133 u i y } ] j k h f6 m n < , ^ 6 + = * 8 & 7 k56 o f7 l > . app f8 ( 9 9 pgup + (num) 5 (num) 3 pgdn enter (num) 0 ins . del / (num) * (num) - (num) insert page up page down home end k107 2 8 6 kor_r 7 home 1 end space delete num lock l-shift r-shift 4 p back space : ; { [ | \ (k29) " ' f11 | \ (k42) enter ? / f12 _ - f9 ) 0 f10 k14 l-alt r-alt print screen scroll lock 000 pause l-win r-ctrl l-ctrl f5 00 q w caps lock a s r-win esc k45 z x f1 ~ ` @ 2 ! 1 k131 k132 kor_l kor_r tab p32 ps/2 mouse clk ps/2 mouse data ps/2 mouse power control notice: ?re turn key? must be forced to port2 for remote wake up function. if not, remote wake up function will not work.
NT6881 17 application circuit 2 (windows 2000 compatible keyboard) NT6881 . vcc gnd led0 led1 led2 osci osco vcp num lock caps lock scroll lock to usb cable v cc vdm vdp 4.7 m f 6mhz crystal 10 m f 1.5k o *1 *1 : resetb can be direct connect to vcc if the external reset is not used for module test. p20 p21 p22 p23 p24 p25 p26 p27 0.1 m f p06 p07 p10 p11 p12 p13 p14 p15 p16 p17 p30 p31 p00 p01 p02 p03 p04 p05 power down sleep wake up power down sleep wake up d+ d- euro key bass+ bass- treble+ scan next bass boost scan previous stop play/ pause mute volume+ volume- email www home www search www backward www forward www stop www refresh www favorite treble- media select calculator p32 my computer p32 4.7k o reset p20 p21 p22 p23 p24 p25 p26 p27 p00 p01 p02 p03 p04 p05 p06 p07 p10 p11 p12 p13 p14 p15 p16 p17 p30 p31 r u i f3 t y } ] d f j k f4 g h f6 c v m b n f2 < , % 5 ^ 6 + = * 8 & 7 $ 4 # 3 e k133 k56 o 7 home 9 pgup + (num) f7 5 (num) l 1 end 3 pgdn enter (num) space 0 ins . del / (num) * (num) - (num) delete insert page up page down > . num lock app home f8 end ( 9 k107 p back space l-shift : ; { [ | \ (k29) r-shift " ' l-alt f11 | \ (k42) enter ? / r-alt f12 _ - f9 ) 0 print screen f10 scroll lock k14 000 pause q w caps lock l-win a s r-win esc k45 z x f1 r-ctrl l-ctrl ~ ` @ 2 ! 1 f5 00 k131 k132 kor_l kor_r 2 8 6 4 tab notice: ?return key? must be forced to port2 for remote wak e up function. if not, remote wake up function will not work.
NT6881 18 application circuit 3 (mini keyboard) NT6881 . vcc gnd led0 led1 led2 osci osco vcp num lock caps lock scroll lock to usb cable v cc vdm vdp 4.7 m f 6mhz crystal 10 m f 1.5k o *1 *1 : resetb can be direct connect to vcc if the external reset is not used for module test. p20 p21 p22 p23 p24 p25 p26 p27 0.1 m f p06 p07 p10 p11 p12 p13 p14 p15 p16 p17 p30 p31 p00 p01 p02 p03 p04 p05 power down sleep wake up power down sleep wake up d+ d- euro key bass+ bass- treble+ scan next bass boost scan previous stop play/ pause mute volume+ volume- email www home www search www backward www forward www stop www refresh www favorite treble- media select calculator p32 my computer p32 4.7k o reset p20 p21 p22 p23 p24 p25 p26 p27 p00 p01 p02 p03 p04 p05 p06 p07 p10 p11 p12 p13 p14 p15 p16 p17 p30 p31 r u i f3 t y } ] d f j k f4 g h f6 c v m b n f2 < , % 5 ^ 6 + = * 8 & 7 $ 4 # 3 e k133 k56 o 7 home 9 pgup + (num) f7 5 (num) l 1 end 3 pgdn enter (num) space 0 ins . del / (num) * (num) - (num) delete insert page up page down > . num lock app home f8 end ( 9 k107 p back space l-shift : ; { [ | \ (k29) r-shift " ' l-alt f11 | \ (k42) enter ? / r-alt f12 _ - f9 ) 0 print screen f10 scroll lock k14 000 pause q w caps lock l-win a s r-win esc k45 z x f1 r-ctrl l-ctrl ~ ` @ 2 ! 1 f5 00 k131 k132 kor_l kor_r 2 8 6 4 tab *fn_k3 *fn_k4 *fn_k2 *fn_k6 *fn_k7 *fn_k8 *4 *5(num) *6 *1 end *2 *3 pgdn *0 ins *. del *fn_k21 *fn_k22 *fn_k16 *fn_k19 *fn_k17 *fn_k20 *fn_k15 *fn_k18 *fn_k24 *fn_k23 *fn_k11 *fn_k12 *fn_k9 *fn_k10 * *(num) * /(num) * +(num) * -(num) *num lock *7 home *9 pgup *8 *fn_k5 *fn_k1 *fn_k13 fn *fn_k14 notice: ?return key? must be forced to port2 for remote wake up function. if not, remote wake up function will not work. *: fo r fn key model usage
NT6881 19 fn key model usage for keypad fn+scroll lock num lock fn+& 7 7 home fn+* 8 8 - fn + ( 9 9 pgup fn+) 0 *(num) fn+u 4 ? fn+i 5(num) fn+o 6 ? fn+p - (num) fn+j 1 end fn+k 2 fn+l 3 pgdn fn+: ; +(num) fn+m 0 ins fn+> . . del fn+? / /(num) fn key model usage for consumer keys fn_k1 fn+f1 www backward fn_k2 fn+f2 www forward fn_k3 fn+f3 www stop fn_k4 fn+f4 www refresh fn_k5 fn+f5 www search fn_k6 fn+f6 www favorite fn_k7 fn+f7 www home fn_k8 f n+f8 email fn_k9 fn+f9 my computer fn_k10 fn+f10 calculator fn_k11 fn+f11 media select fn_k12 fn+f12 mute fn_k13 fn+print screen bass boost fn_k14 fn+pause sleep fn_k15 fn+insert volume+ fn_k16 fn+home bass+ fn_k17 fn+page up treble+ fn_k18 fn+delete volume - fn_k19 fn+end bass - fn_k20 fn+page down treble - fn_k21 fn+ - stop fn_k22 fn+ ? scan previous track fn_k23 fn+ play/pause fn_k24 fn+ ? scan next track
NT6881 20 bonding diagram 2235.2 m m 2082.8 m m (0, 0) x y NT6881h 26 25 18 17 16 15 14 4 3 2 1 42 41 40 39 p 1 0 p 1 1 p 1 2 p 1 3 p 1 4 p 0 6 p 0 5 p 0 4 p20 p21 p22 p23 p24 p25 p26 p27 led0 led1 led2 vdm p30 p31 p32 p33 p34 reset p00 p01 p02 v d p v c p g n d g n d o s c i o s c o v c c v c c p 0 7 13 12 11 10 9 8 7 5 35 36 37 38 31 32 33 34 27 28 29 30 24 23 22 21 20 19 p03 6 p 1 5 p 1 6 p17 substrate connect to gnd unit: m m pad no. designation x y 1 gnd - 28.90 806.90 2 gnd - 163.90 806.95 3 vcp - 424.10 819.55 4 vdp - 841.85 828.05 5 vdm - 924.35 549.95 6 p30 - 979.05 275.10 7 p31 - 980.35 140.70 8 p32 - 980.40 10.65 9 p33 - 980.40 - 119.30 10 p34 - 980.50 - 249.30 1 1 reset - 980.70 - 380.20 12 p00 - 980.30 - 509.30 13 p01 - 980.30 - 639.25 14 p02 - 980.40 - 769.30 15 p03 - 980.40 - 899.30 16 p04 - 601.05 - 859.30 17 p05 - 350.25 - 859.30 18 p06 - 218.25 - 859.30 19 p07 52.15 - 901.40 20 p10 182.15 - 901.40 21 p1 1 312.15 - 901.40 pad no. designation x y 22 p12 442.15 - 901.40 23 p13 572.15 - 901.40 24 p14 702.15 - 901.40 25 p15 832.15 - 901.40 26 p16 962.15 - 901.40 27 p17 980.50 - 561.55 28 p20 980.45 - 426.75 29 p21 980.35 - 292.35 30 p22 980.35 - 162.50 3 1 p23 980.40 - 32.40 32 p24 980.15 97.60 33 p25 980.45 227.65 34 p26 980.40 357.55 35 p27 980.35 487.75 36 led0 980.40 628.70 37 led1 980.40 754.80 38 led2 980.40 888.75 39 vcc 685.45 793.80 40 vcc 512.75 793.80 41 osco 288.75 883.80 42 osci 158. 75 883.80
NT6881 21 ordering information part no. packages NT6881h chip form NT6881 40l dip standard code functional descriptions code number name reference application circuit functional description NT6881 - d01012 simple keyboard with ps/2 mouse applicatio n circuit 1 1. ps/2 mouse port 2. '000' and '00' keys NT6881 - d01013 windows 2000 compatible keyboard application circuit 2 1. acpi keys 2. '000', '00' and euro keys 3. consumer keys (windows 2000 ) NT6881 - d01014 mini keyboard application circuit 3 1. acpi keys 2. ? 000 ? , ? 00 ? and euro keys 3. consumer keys (windows 2000) 4. fn key and 4 0 translated keys
NT6881 22 package information p - dip 40l outline dimensions unit: inches/mm 1 21 40 e 1 s a 2 a l e e a d c a b 1 b a 1 base plane seating plane 20 e 1 symbol dimensions in inches dimensions in mm a 0.210 max. 5.33 max . a 1 0.010 min. 0.25 min. a 2 0.1550.010 3.940.25 b 0.018 +0.004 0.46 +0.10 - 0.002 - 0.05 b 1 0.050 +0.004 1.27 +0.10 - 0.002 - 0.05 c 0.010 +0.004 0.25 +0.10 - 0.002 - 0.05 d 2.055 typ. (2.075 max.) 52.20 typ. (52.71 max.) e 0.6000.010 15.2 40.25 e 1 0.550 typ. (0.562 max.) 13.97 typ. (14.27 max.) e 1 0.1000.010 2.540.25 l 0.1300.010 3.300.25 \ 0~ 15 0~ 15 e a 0.6550.035 16.640.89 s 0.093 max. 2.36 max. note: 1. the maximum value of dimension d includes end flash. 2. dimension e 1 does not include resin fins. 3. dimension s includes end flash.
NT6881 23 product spec. change notice NT6881 speci fication revision history version content data 2.7 fn key model usage for consumer keys modified - fn_k22 and fn_k24 (page 19) oct. 2002 2.6 volume knob application deleted (page 13) ps/2 mouse application added (page 13 and 14) application circuit 2 an d 3 modified (page 17 and 18) fn key usage added (page 1 9 ) standard code functional descriptions modified (page 21) sep. 2002 2.5 application circuits modified (page 15, 16 and 17) standard code functional description added (page19) july 2002 1.0 origina l nov. 1998

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